In the recent past, distortion levels in commercial modulator/demodulator circuits ("modems") for data communications were rarely a critical design parameter. Generally, the speeds of data transfer were low enough and the dynamic range of signal levels was low enough that distortion was not a significant problem. Classical performance requirements, for example signal-to-distortion levels of about 50 dB, are easy to achieve using well established design and layout techniques.
In the high speed data communications environment, for example in a 9600 bps full duplex echo-cancelling V.32 modem, performance requirements are much higher. The minimum acceptable signal-to-distortion level is on the order of 72 dB for such modems. These higher performance specifications clearly call for much greater care in design to reduce harmonic distortion.
Sigma delta modulation is a technique described in the prior art literature which has been suggested for use in "codec" (coder/decoder) line cards employed in telephone company central offices for converting voice signals into digital form for communication transmission. The technique, a form of pulse code modulation (PCM), involves oversampling, integration and feedback for moving quantization noise out of baseband into a spectral region where it can be digitally filtered and eliminated. However, the present inventors do not have any knowledge that sigma delta modulation has ever been employed in a modem, due in part to the high signal processing speeds which must occur.
Sigma delta modulation has been employed in digital-to-analog converter (D/A) and analog-to-digital (A/D) converter circuits. One known problem encountered with conventionally constructed sigma-delta modulators in the D/A application is that the performance of the method is less than theory predicts. The inventors herein believe that this problem is probably common to other applications which employ oversampling to obtain high resolution and linearity.
Theory predicts that a second order sigma delta modulator will obtain an improvement in resolution of about 15 dB per octave of oversampling. When considering a one-bit D/A converter, and using an oversampling factor of 128, theory predicts a resolution of 105 dB. Actually constructed devices employing conventional methods for implementing sigma delta modulation have been observed to exhibit a much poorer performance; in one experiment conducted by the inventors there was an unexplained harmonic distortion of -27 dB. It is believed that the source of the unsatisfactory performance relates to the rise and fall times of the analog signal in the one-bit D/A converter. It is also believed that the distortion is caused when the rise and fall times of the one bit D/A converter are not equal.
Some prior art modem designs employ switched capacitor integrators as a part of the filters and A/D converters in the analog front end for the circuit, that is, the portion of the circuit that interfaces with the telephone line. There are numerous sources of distortion in switched-capacitor integrators, for example capacitor non-linearities and operational amplifier gain and slew rate non-linearities. However, it is believed by the inventors herein that distortion induced by signal level dependent charge injection from the switching MOSFETs in switched capacitor integrators is the dominant distortion mechanism in circuits which employ such integrators.
Accordingly, there is a need for low distortion circuits for use in constructing V.32 or other similar high speed data communications circuits such as modems. In particular, there is a need for a low distortion switched capacitor integrator and for a workable high performance sigma delta modulator for use in such high speed data communications circuits.